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IJKL
2007
68views more  IJKL 2007»
14 years 9 months ago
Modelling the creation of value from intellectual capital: a Portuguese banking perspective
: Despite the widely recognised importance of intellectual capital as a vital source of competitive advantage, there is still little understanding of how organisations actually com...
Maria do Rosário Cabrita, Jorge Landeiro De...
83
Voted
TSP
2008
113views more  TSP 2008»
14 years 9 months ago
Hybrid Filter Banks With Fractional Delays: Minimax Design and Application to Multichannel Sampling
This paper is motivated by multichannel sampling applications. We consider a hybrid filter banks consisting of a set of fractional delays operators, slow A/D converters with differ...
Ha Thai Nguyen, Minh N. Do
DATE
2007
IEEE
95views Hardware» more  DATE 2007»
15 years 4 months ago
Memory bank aware dynamic loop scheduling
In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied i...
Mahmut T. Kandemir, Taylan Yemliha, Seung Woo Son,...
ISCA
2011
IEEE
386views Hardware» more  ISCA 2011»
14 years 1 months ago
Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs
Emerging memory technologies such as STT-RAM, PCRAM, and resistive RAM are being explored as potential replacements to existing on-chip caches or main memories for future multi-co...
Asit K. Mishra, Xiangyu Dong, Guangyu Sun, Yuan Xi...
ICDAR
2011
IEEE
13 years 9 months ago
Binarizing the Courtesy Amount Field on Color Chinese Bank Check Images
—A novel binarization method for courtesy amount recognition of color Chinese checks is proposed in this paper. It includes two steps: background removal and seal removal. In the...
Dong Liu, Youbin Chen