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IEEEPACT
2002
IEEE
15 years 8 months ago
Optimizing Loop Performance for Clustered VLIW Architectures
Modern embedded systems often require high degrees of instruction-level parallelism (ILP) within strict constraints on power consumption and chip cost. Unfortunately, a high-perfo...
Yi Qian, Steve Carr, Philip H. Sweany
157
Voted
IPPS
1999
IEEE
15 years 7 months ago
Process Networks as a High-Level Notation for Metacomputing
Abstract. Our work involves the development of a prototype Geographical Information System GIS as an example of the use of process networks as a well-de ned high-level semantic mod...
Darren Webb, Andrew L. Wendelborn, Kevin Maciunas
ICCD
2006
IEEE
139views Hardware» more  ICCD 2006»
16 years 12 days ago
Perceptron Based Consumer Prediction in Shared-Memory Multiprocessors
Abstract— Recent research has shown that forwarding speculative data to other processors before it is requested can improve the performance of multiprocessor systems. The most re...
Sean Leventhal, Manoj Franklin
IPPS
2009
IEEE
15 years 10 months ago
Performance projection of HPC applications using SPEC CFP2006 benchmarks
Performance projections of High Performance Computing (HPC) applications onto various hardware platforms are important for hardware vendors and HPC users. The projections aid hard...
Sameh Sharkawi, Don DeSota, Raj Panda, Rajeev Indu...
115
Voted
VLDB
2001
ACM
121views Database» more  VLDB 2001»
15 years 8 months ago
Weaving Relations for Cache Performance
Relational database systems have traditionally optimzed for I/O performance and organized records sequentially on disk pages using the N-ary Storage Model (NSM) (a.k.a., slotted p...
Anastassia Ailamaki, David J. DeWitt, Mark D. Hill...