6388 search results - page 105 / 1278 » High Performance Data Mining |
130
Voted
GLOBECOM
2008
IEEE
15 years 10 months ago
2008
IEEE
— Large MIMO systems with tens of antennas in each communication terminal using full-rate non-orthogonal spacetime block codes (STBC) from Cyclic Division Algebras (CDA) can achi...
121
Voted
CLUSTER
2006
IEEE
15 years 9 months ago
2006
IEEE
As new processor and memory architectures advance, clusters start to be built from larger SMP systems, which makes MPI intra-node communication a critical issue in high performanc...
191
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TVLSI
2010
14 years 10 months ago
2010
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
136
Voted
DAC
2001
ACM
16 years 4 months ago
2001
ACM
This paper presents LOTTERYBUS, a novel high-performance communication architecture for system-on-chip (SoC) designs. The LOTTERYBUS architecture was designed to address the follo...
147
Voted
TKDE
1998
15 years 3 months ago
1998
—There is an ever-increasing demand for more complex transactions and higher throughputs in transaction processing systems leading to higher degrees of transaction concurrency an...