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» High Performance FPGA Implementation of the Mersenne Twister
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ERSA
2007
86views Hardware» more  ERSA 2007»
14 years 11 months ago
High-Precision BLAS on FPGA-enhanced Computers
The emergence of high-density reconfigurable hardware devices gives scientists and engineers an option to accelerating their numerical computing applications on low-cost but power...
Chuan He, Guan Qin, Richard E. Ewing, Wei Zhao
FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
14 years 10 months ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek
HIPEAC
2007
Springer
15 years 1 months ago
Customizing the Datapath and ISA of Soft VLIW Processors
In this paper, we examine the trade-offs in performance and area due to customizing the datapath and instruction set architecture of a soft VLIW processor implemented in a high-den...
Mazen A. R. Saghir, Mohamad El-Majzoub, Patrick Ak...
FPL
2004
Springer
141views Hardware» more  FPL 2004»
15 years 3 months ago
Automatic Synthesis of Efficient Intrusion Detection Systems on FPGAs
—This paper presents a methodology and a tool for automatic synthesis of highly efficient intrusion detection systems using a high-level, graph-based partitioning methodology and...
Zachary K. Baker, Viktor K. Prasanna
FPL
2004
Springer
171views Hardware» more  FPL 2004»
15 years 3 months ago
A Modular System for FPGA-Based TCP Flow Processing in High-Speed Networks
Field Programmable Gate Arrays (FPGAs) can be used in Intrusion Prevention Systems (IPS) to inspect application data contained within network flows. An IPS operating on high-speed...
David V. Schuehler, John W. Lockwood