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CJ
2006
84views more  CJ 2006»
14 years 12 months ago
Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope
CCGRID
2008
IEEE
15 years 6 months ago
Admission Control in a Computational Market
We propose, implement and evaluate three admission models for computational Grids. The models take the expected demand into account and offer a specific performance guarantee. Th...
Thomas Sandholm, Kevin Lai, Scott H. Clearwater
AI
2011
Springer
14 years 3 months ago
Parallelizing a Convergent Approximate Inference Method
Probabilistic inference in graphical models is a prevalent task in statistics and artificial intelligence. The ability to perform this inference task efficiently is critical in l...
Ming Su, Elizabeth Thompson
IPPS
2005
IEEE
15 years 5 months ago
Combining FT-MPI with H2O: Fault-Tolerant MPI Across Administrative Boundaries
We observe increasing interest in aggregating geographically distributed, heterogeneous resources to perform large scale computations. MPI remains the most popular programming par...
Dawid Kurzyniec, Vaidy S. Sunderam
IPPS
2010
IEEE
14 years 9 months ago
Optimization of linked list prefix computations on multithreaded GPUs using CUDA
We present a number of optimization techniques to compute prefix sums on linked lists and implement them on multithreaded GPUs using CUDA. Prefix computations on linked structures ...
Zheng Wei, Joseph JáJá