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» High Performance Pipelined Process Migration with RDMA
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ESTIMEDIA
2009
Springer
14 years 9 months ago
Inter-kernel data reuse and pipelining on chip-multiprocessors for multimedia applications
The increasing demand for low power and high performance multimedia embedded systems has motivated the need for effective solutions to satisfy application bandwidth and latency req...
Luis Angel D. Bathen, Yongjin Ahn, Nikil D. Dutt, ...
SIGMOD
2011
ACM
220views Database» more  SIGMOD 2011»
14 years 2 months ago
Zephyr: live migration in shared nothing databases for elastic cloud platforms
Multitenant data infrastructures for large cloud platforms hosting hundreds of thousands of applications face the challenge of serving applications characterized by small data foo...
Aaron J. Elmore, Sudipto Das, Divyakant Agrawal, A...
FPGA
1999
ACM
174views FPGA» more  FPGA 1999»
15 years 4 months ago
Reduction of Latency and Resource Usage in Bit-Level Pipelined Data Paths for FPGAs
Pipelining of data path structures increases the throughput rate at the expense of enlarged resource usage and latency unless architectures optimized towards specific applications...
Peter Kollig, Bashir M. Al-Hashimi
WWW
2005
ACM
16 years 12 days ago
A multi-threaded PIPELINED Web server architecture for SMP/SoC machines
Design of high performance Web servers has become a recent research thrust to meet the increasing demand of networkbased services. In this paper, we propose a new Web server archi...
Gyu Sang Choi, Jin-Ha Kim, Deniz Ersoz, Chita R. D...
92
Voted
ASAP
2006
IEEE
130views Hardware» more  ASAP 2006»
15 years 5 months ago
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, ...