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» High Performance Reasoning with Very Large Knowledge Bases
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VLSID
2002
IEEE
105views VLSI» more  VLSID 2002»
15 years 10 months ago
A Heuristic for Clock Selection in High-Level Synthesis
Clock selection has a significant impact on the performance and quality of designs in high-level synthesis. In most synthesis systems, a convenient value of the clock is chosen or...
J. Ramanujam, Sandeep Deshpande, Jinpyo Hong, Mahm...
AIM
2006
14 years 9 months ago
Comparative Analysis of Frameworks for Knowledge-Intensive Intelligent Agents
maintain awareness of its environment for a long period of time. Additionally, knowledge-intensive agents must be engineered such that their knowledge can be easily updated as envi...
Randolph M. Jones, Robert E. Wray III
AAAI
2006
14 years 11 months ago
Using an Ontology for Knowledge Acquisition
We describe an approach to distributed knowledge acquisition using an ontology. The ontology is used to represent and reason about soldier performance. These methods are embedded ...
Stacy Lovell, Webb Stacy
HPCC
2007
Springer
15 years 3 months ago
A Block JRS Algorithm for Highly Parallel Computation of SVDs
This paper presents a new algorithm for computing the singular value decomposition (SVD) on multilevel memory hierarchy architectures. This algorithm is based on one-sided JRS iter...
Mostafa I. Soliman, Sanguthevar Rajasekaran, Reda ...
MICRO
2006
IEEE
132views Hardware» more  MICRO 2006»
15 years 3 months ago
Scalable Cache Miss Handling for High Memory-Level Parallelism
Recently-proposed processor microarchitectures for high Memory Level Parallelism (MLP) promise substantial performance gains. Unfortunately, current cache hierarchies have Miss-Ha...
James Tuck, Luis Ceze, Josep Torrellas