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ICPP
2009
IEEE
15 years 4 months ago
Bank-aware Dynamic Cache Partitioning for Multicore Architectures
Abstract—As Chip-Multiprocessor systems (CMP) have become the predominant topology for leading microprocessors, critical components of the system are now integrated on a single c...
Dimitris Kaseridis, Jeffrey Stuecheli, Lizy K. Joh...
OTM
2005
Springer
15 years 3 months ago
Optimization of Distributed Queries in Grid Via Caching
Abstract. Caching can highly improve performance of query processing in distributed databases. In this paper we show how this technique can be used in grid architecture where data ...
Piotr Cybula, Hanna Kozankiewicz, Krzysztof Stence...
ASPDAC
2004
ACM
158views Hardware» more  ASPDAC 2004»
15 years 1 months ago
Decode filter cache for energy efficient instruction cache hierarchy in super scalar architectures
Abstract-- The power consumption of microprocessors has been increasing in step with the complexity of each progressive generation. In general purpose processors, this is primarily...
Kugan Vivekanandarajah, Thambipillai Srikanthan, S...
RTCSA
2007
IEEE
15 years 3 months ago
An MPSoC Performance Estimation Framework Using Transaction Level Modeling
— To use the tremendous hardware resources available in next generation MultiProcessor Systems-on-Chip (MPSoC) efficiently, rapid and accurate design space exploration (DSE) met...
Rabie Ben Atitallah, Smaïl Niar, Samy Meftali...
HIPC
2007
Springer
15 years 3 months ago
Channel Adaptive Real-Time MAC Protocols for a Two-Level Heterogeneous Wireless Network
Abstract. Wireless technology is becoming an attractive mode of communication for real-time applications in typical settings such as in an industrial setup because of the tremendou...
Kavitha Balasubramanian, G. Sudha Anil Kumar, G. M...