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IEEEPACT
2003
IEEE
15 years 2 months ago
Design Trade-Offs in High-Throughput Coherence Controllers
Recent research shows that the high occupancy of Coherence Controllers (CCs) is a major performance bottleneck in scalable shared-memory multiprocessors. In this paper, we propose...
Anthony-Trung Nguyen, Josep Torrellas
MONET
2006
129views more  MONET 2006»
14 years 9 months ago
Enabling Intelligent Handovers in Heterogeneous Wireless Networks
In the future Wireless Internet, mobile nodes will be able to choose between providers offering competing services at a much finer granularity than we find today. Rather than month...
Robert C. Chalmers, Govind Krishnamurthi, Kevin C....
94
Voted
PPOPP
2010
ACM
15 years 7 months ago
Does cache sharing on modern CMP matter to the performance of contemporary multithreaded programs?
Most modern Chip Multiprocessors (CMP) feature shared cache on chip. For multithreaded applications, the sharing reduces communication latency among co-running threads, but also r...
Eddy Z. Zhang, Xipeng Shen, Yunlian Jiang
LCN
2005
IEEE
15 years 3 months ago
Design and Evaluation of a High Performance Parallel File System
In this paper we propose a high performance parallel file system over iSCSI (iPVFS) for cluster computing. iPVFS provides a cost-effective solution for heterogeneous cluster envi...
Li Ou, Xubin (Ben) He
CASES
2001
ACM
15 years 1 months ago
A system-on-a-chip lock cache with task preemption support
Intertask/interprocess synchronization overheads may be significant in a multiprocessor-shared memory System-on-a-Chip implementation. These overheads are observed in terms of loc...
Bilge Saglam Akgul, Jaehwan Lee, Vincent John Moon...