154 search results - page 24 / 31 » High level cache simulation for heterogeneous multiprocessor... |
DAC
1999
ACM
15 years 10 months ago
1999
ACM
We present a framework for rapidly exploring the design space of low power application-specific programmable processors (ASPP), in particular mediaprocessors. We focus on a catego...
72
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ISCA
1993
IEEE
15 years 1 months ago
1993
IEEE
Parity encoded redundant disk arrays provide highly reliable, cost effective secondary storage with high performance for read accesses and large write accesses. Their performance ...
101
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SASP
2009
IEEE
15 years 4 months ago
2009
IEEE
— As growing power dissipation and thermal effects disrupted the rising clock frequency trend and threatened to annul Moore’s law, the computing industry has switched its route...
DAC
2007
ACM
15 years 10 months ago
2007
ACM
Due to high levels of integration and complexity, the design of multi-core SoCs has become increasingly challenging. In particular, energy consumption and distributing a single gl...
HPDC
1998
IEEE
15 years 1 months ago
1998
IEEE
The development of applications and tools for highperformance "computational grids" is complicated by the heterogeneity and frequently dynamic behavior of the underlying...