154 search results - page 9 / 31 » High level cache simulation for heterogeneous multiprocessor... |
CODES
2007
IEEE
15 years 4 months ago
2007
IEEE
The design and analysis of today’s complex real-time systems requires advanced methods. Due to ever growing functionality, hardware complexity and component interaction, applyin...
ISPASS
2007
IEEE
15 years 3 months ago
2007
IEEE
In this paper, we introduce PTLsim, a cycle accurate full system x86-64 microprocessor simulator and virtual machine. PTLsim models a modern superscalar out of order x86-64 proces...
IEEEPACT
2003
IEEE
15 years 2 months ago
2003
IEEE
We investigate the implementation of IP look-up for core routers using multiple microengines and a tailored memory hierarchy. The main architectural concerns are limiting the numb...
ICCAD
1993
IEEE
15 years 1 months ago
1993
IEEE
Circuit simulation is one of the most computationally expensive tasks in circuit design and optimization. Detailed simulation at the level of precision of SPICE is usually perform...
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SIGMETRICS
1996
ACM
15 years 1 months ago
1996
ACM
This paper describes Embra, a simulator for the processors, caches, and memory systems of uniprocessors and cache-coherent multiprocessors. When running as part of the SimOS simul...