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» High performance computing through parallel processing
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PPOPP
2010
ACM
15 years 10 months ago
Thread to strand binding of parallel network applications in massive multi-threaded systems
In processors with several levels of hardware resource sharing, like CMPs in which each core is an SMT, the scheduling process becomes more complex than in processors with a singl...
Petar Radojkovic, Vladimir Cakarevic, Javier Verd&...
175
Voted
SSDBM
1999
IEEE
140views Database» more  SSDBM 1999»
15 years 7 months ago
An Infrastructure for Scalable Parallel Multidimensional Analysis
Multidimensional Analysis in On-Line Analytical Processing (OLAP), and Scientific and statistical databases (SSDB) use operations requiring summary information on multi-dimensiona...
Sanjay Goil, Alok N. Choudhary
ISCAS
2007
IEEE
161views Hardware» more  ISCAS 2007»
15 years 9 months ago
Hardware Architecture of a Parallel Pattern Matching Engine
Abstract— Several network security and QoS applications require detecting multiple string matches in the packet payload by comparing it against predefined pattern set. This proc...
Meeta Yadav, Ashwini Venkatachaliah, Paul D. Franz...
124
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ISCA
1992
IEEE
113views Hardware» more  ISCA 1992»
15 years 7 months ago
Dynamic Dependency Analysis of Ordinary Programs
A quantitative analysis of program execution is essential to the computer architecture design process. With the current trend in architecture of enhancing the performance of unipr...
Todd M. Austin, Gurindar S. Sohi
CATA
2004
15 years 4 months ago
The Instruction Execution Mechanism for Responsive Multithreaded Processor
This paper describes the instruction execution mechanism of Responsive Multithreaded (RMT) Processor for distributed real-time processing. The execution order of each thread is co...
Tstomu Itou, Nobuyuki Yamasaki