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» High performance computing through parallel processing
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ISPA
2004
Springer
15 years 9 months ago
HPL Performance Prevision to Intending System Improvement
HPL is a parallel Linpack benchmark package widely adopted in massive cluster system performance test. On HPL data layout among processors, a law to determine block size NB theoret...
Wenli Zhang, Mingyu Chen, Jianping Fan
ICDE
2010
IEEE
231views Database» more  ICDE 2010»
15 years 10 months ago
Estimating the progress of MapReduce pipelines
Abstract— In parallel query-processing environments, accurate, time-oriented progress indicators could provide much utility given that inter- and intra-query execution times can ...
Kristi Morton, Abram Friesen, Magdalena Balazinska...
ICASSP
2008
IEEE
15 years 10 months ago
Analyzing the scalability of SIMD for the next generation software defined radio
Previous studies have shown that wireless DSP algorithms exhibit high levels of data level parallelism (DLP). Commercial and research work in the field of software defined radio...
Mark Woh, Yuan Lin, Sangwon Seo, Trevor N. Mudge, ...
TVLSI
2008
126views more  TVLSI 2008»
15 years 3 months ago
Body Bias Voltage Computations for Process and Temperature Compensation
With continued scaling into the sub-90nm regime, the role of process, voltage and temperature (PVT) variations on the performance of VLSI circuits has become extremely important. T...
Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatneka...
ICNP
1998
IEEE
15 years 8 months ago
On Reducing the Processing Cost of On-Demand QoS Path Computation
Quality of Service (QoS) routing algorithms have become the focus of recent research due to their potential for increasing the utilization of an Integrated Services Packet Network...
George Apostolopoulos, Satish K. Tripathi