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» High performance computing through parallel processing
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TVLSI
2008
85views more  TVLSI 2008»
15 years 4 months ago
Low-Complexity Policies for Energy-Performance Tradeoff in Chip-Multi-Processors
Chip-Multi-Processors (CMP) utilize multiple energy-efficient Processing Elements (PEs) to deliver high performance while maintaining an efficient ratio of performance to energy-c...
A. Elyada, Ran Ginosar, Uri Weiser
IPPS
2006
IEEE
15 years 10 months ago
A multiprocessor architecture for the massively parallel model GCA
The GCA (Global Cellular Automata) model consists of a collection of cells which change their states synchronously depending on the states of their neighbors like in the classical...
Wolfgang Heenes, Rolf Hoffmann, Johannes Jendrsczo...
ICRA
2009
IEEE
116views Robotics» more  ICRA 2009»
15 years 2 months ago
Kinematic analysis and optimal design of a 3T1R type parallel mechanism
In previous studies on 4-DOF parallel mechanisms with four sub-chains, only symmetric arrangement of those four chains connected to the top plate was considered. Such symmetric sha...
Sung Mok Kim, Whee Kuk Kim, Byung-Ju Yi
121
Voted
ICDCSW
2007
IEEE
15 years 11 months ago
Building Trust in Online Rating Systems Through Signal Modeling
Abstract— Online feedback-based rating systems are gaining popularity. Dealing with unfair ratings in such systems has been recognized as an important but difficult problem. Thi...
Yafei Yang, Yan Lindsay Sun, Jin Ren, Qing Yang
153
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ACSC
2004
IEEE
15 years 8 months ago
Reducing Register Pressure Through LAER Algorithm
When modern processors keep increasing the instruction window size and the issue width to exploit more instruction-level parallelism (ILP), the demand of larger physical register ...
Gao Song