6138 search results - page 47 / 1228 » High performance computing through parallel processing |
FCCM
2006
IEEE
15 years 5 months ago
2006
IEEE
This paper presents a novel reconfigurable data flow processing architecture that promises high performance by explicitly targeting both fine- and course-grained parallelism. This...
ASPDAC
2007
ACM
15 years 3 months ago
2007
ACM
- Most image processing applications are computationally intensive and data intensive. Reconfigurable hardware boards provide a convenient and flexible solution to speed up these a...
130
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IJHPCA
2008
14 years 11 months ago
2008
We present a de novo hierarchical simulation framework for first-principles based predictive simulations of materials and their validation on high-end parallel supercomputers and ...
125
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IPPS
2010
IEEE
14 years 9 months ago
2010
IEEE
To exploit the potential of multicore architectures, recent dense linear algebra libraries have used tile algorithms, which consist in scheduling a Directed Acyclic Graph (DAG) of...
ARC
2010
Springer
15 years 3 months ago
2010
Springer
High-Performance Reconfigurable Computers (HPRCs) are parallel machines consisting of FPGAs and microprocessors, with the FPGAs used as co-processors. The execution of parallel app...