We demonstrate the use of highly parallel graphics processing units (GPUs) to accelerate the Superposition/Convolution (S/C) algorithm to interactive rates while reducing the numbe...
Robert Jacques, Russell Taylor, John Wong, Todd Mc...
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
Mohamed M. Sabry, Martino Ruggiero, Pablo Garcia D...
Modern internet and telephone switches consist of numerous VLSI-circuits operating at high frequencies to handle high bandwidths. It is beyond question that such systems must cont...
Competitive parallel execution (CPE) is a simple yet attractive technique to improve the performance of sequential programs on multi-core and multi-processor systems. A sequential...
Focused around the field of the exploitation and the administration of high performance large-scale parallel systems , this article describes the work carried out on the deployme...