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VLSID
2007
IEEE
210views VLSI» more  VLSID 2007»
15 years 9 months ago
Dynamically Optimizing FPGA Applications by Monitoring Temperature and Workloads
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
Phillip H. Jones, Young H. Cho, John W. Lockwood
SIGCOMM
2006
ACM
15 years 3 months ago
Algorithms to accelerate multiple regular expressions matching for deep packet inspection
There is a growing demand for network devices capable of examining the content of data packets in order to improve network security and provide application-specific services. Most...
Sailesh Kumar, Sarang Dharmapurikar, Fang Yu, Patr...
69
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ANCS
2007
ACM
15 years 1 months ago
Frame-aggregated concurrent matching switch
Network operators need high-capacity router architectures that can offer scalability, provide throughput and performance guarantees, and maintain packet ordering. However, previou...
Bill Lin, Isaac Keslassy
IPPS
2008
IEEE
15 years 3 months ago
Parallel IP lookup using multiple SRAM-based pipelines
Pipelined SRAM-based algorithmic solutions have become competitive alternatives to TCAMs (ternary content addressable memories) for high throughput IP lookup. Multiple pipelines c...
Weirong Jiang, Viktor K. Prasanna
INFOCOM
2003
IEEE
15 years 2 months ago
Exploiting Parallelism to Boost Data-Path Rate in High-Speed IP/MPLS Networking
Abstract—Link bundling is a way to increase routing scalability whenever a pair of Label Switching Routers in MPLS are connected by multiple parallel links. However, link bundlin...
Indra Widjaja, Anwar Elwalid