116 search results - page 18 / 24 » High throughput architecture for packet classification using... |
SC
2005
ACM
15 years 3 months ago
2005
ACM
We address the problem of how to exploit optics for ultrascale High Performance Computing interconnect fabrics. We show that for high port counts these fabrics require multistage ...
INFOCOM
2006
IEEE
15 years 3 months ago
2006
IEEE
— The input-queued switch architecture is widely used in Internet routers, due to its ability to run at very high line speeds. A central problem in designing an input-queued swit...
ASAP
2008
IEEE
15 years 4 months ago
2008
IEEE
We address the problem of data parallel processing for computational quantum chemistry (CQC). CQC is a computationally demanding tool to study the electronic structure of molecule...
VTC
2006
IEEE
2006
IEEE
Design and Implementation of Robust Time/Frequency Offset Tracking Algorithm for MIMO-OFDM Receivers
15 years 3 months ago
— In this paper, the robust time and frequency offset tracking algorithms and architecture for high throughput wireless local area network (WLAN) systems are presented. The desig...
DELTA
2010
IEEE
15 years 2 months ago
2010
IEEE
— FPGAs, (Field-Programmable Gate Arrays) are often used for embedded image processing applications. Parallelism, and in particular pipelining, is the most suitable architecture ...