116 search results - page 5 / 24 » High throughput architecture for packet classification using... |
ANCS
2009
ACM
14 years 7 months ago
2009
ACM
AtoZ, an automatic traffic organizer, provides control of how network-resources are used by applications. It does this by combining the high-speed packet processing of the NetFPGA...
ISCAS
1994
IEEE
15 years 1 months ago
1994
IEEE
This paper presents a novel VLSI architecture for high-speed data compressor designs which implement the well-known LZ77 algorithm. The architecture mainly consists of three units...
FPGA
2004
ACM
15 years 2 months ago
2004
ACM
FPGAs normally operate at whatever clock rate is appropriate for the loaded configuration. When FPGAs are used as computational devices in a larger system, however, it is better ...
101
click to vote
FPL
2005
Springer
15 years 3 months ago
2005
Springer
With the onset of Gigabit networks, current generation networking components will soon be insufficient for numerous reasons: most notably because existing methods cannot support h...
DDECS
2009
IEEE
15 years 4 months ago
2009
IEEE
—Packet header analysis and extraction of header fields needs to be performed in all network devices. As network speed is increasing quickly, high speed packet header processing...