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92
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ASPDAC
2004
ACM
96views Hardware» more  ASPDAC 2004»
15 years 4 months ago
Rate analysis for streaming applications with on-chip buffer constraints
While mapping a streaming (such as multimedia or network packet processing) application onto a specified architecture, an important issue is to determine the input stream rates tha...
Alexander Maxiaguine, Simon Künzli, Samarjit ...
87
Voted
ASPLOS
2008
ACM
15 years 2 months ago
SoftSig: software-exposed hardware signatures for code analysis and optimization
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...
James Tuck, Wonsun Ahn, Luis Ceze, Josep Torrellas
CJ
2004
141views more  CJ 2004»
15 years 19 days ago
Modeling and Analysis of a Scheduled Maintenance System: a DSPN Approach
This paper describes a way to manage the modeling and analysis of Scheduled Maintenance Systems (SMS) within an analytically tractable context. We chose a significant case study h...
Andrea Bondavalli, Roberto Filippini
COMPSAC
2007
IEEE
15 years 7 months ago
A Static Analysis Framework For Detecting SQL Injection Vulnerabilities
Recently SQL Injection Attack (SIA) has become a major threat to Web applications. Via carefully crafted user input, attackers can expose or manipulate the back-end database of a ...
Xiang Fu, Xin Lu, Boris Peltsverger, Shijun Chen, ...
97
Voted
DATE
2007
IEEE
128views Hardware» more  DATE 2007»
15 years 7 months ago
Accounting for cache-related preemption delay in dynamic priority schedulability analysis
Recently there has been considerable interest in incorporating timing effects of microarchitectural features of processors (e.g. caches and pipelines) into the schedulability anal...
Lei Ju, Samarjit Chakraborty, Abhik Roychoudhury