Sciweavers

1024 search results - page 183 / 205
» High-Level Execution Time Analysis
Sort
View
103
Voted
DATE
2009
IEEE
189views Hardware» more  DATE 2009»
15 years 7 months ago
CUFFS: An instruction count based architectural framework for security of MPSoCs
—Multiprocessor System on Chip (MPSoC) architecture is rapidly gaining momentum for modern embedded devices. The vulnerabilities in software on MPSoCs are often exploited to caus...
Krutartha Patel, Sri Parameswaran, Roshan G. Ragel
101
Voted
GRID
2007
Springer
15 years 6 months ago
On the dynamic resource availability in grids
— Currently deployed grids gather together thousands of computational and storage resources for the benefit of a large community of scientists. However, the large scale, the wid...
Alexandru Iosup, Mathieu Jan, Omer Ozan Sonmez, Di...
PC
2006
218views Management» more  PC 2006»
15 years 19 days ago
A model based on cellular automata for the parallel simulation of 3D unsaturated flow
Cellular automata (CA) are discrete dynamic systems that have been used for modeling many physical systems. CA are often used as an alternative to model and solve large-scale syst...
Gianluigi Folino, Giuseppe Mendicino, Alfonso Sena...
SIGSOFT
2007
ACM
16 years 1 months ago
Efficient checkpointing of java software using context-sensitive capture and replay
Checkpointing and replaying is an attractive technique that has been used widely at the operating/runtime system level to provide fault tolerance. Applying such a technique at the...
Guoqing Xu, Atanas Rountev, Yan Tang, Feng Qin
119
Voted
IEEEPACT
2008
IEEE
15 years 7 months ago
Characterizing and modeling the behavior of context switch misses
One of the essential features in modern computer systems is context switching, which allows multiple threads of execution to time-share a limited number of processors. While very ...
Fang Liu, Fei Guo, Yan Solihin, Seongbeom Kim, Abd...