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ICCAD
2001
IEEE
128views Hardware» more  ICCAD 2001»
15 years 8 months ago
An Assembly-Level Execution-Time Model for Pipelined Architectures
The aim of this work is to provide an elegant and accurate static execution timing model for 32-bit microprocessor instruction sets, covering also inter–instruction effects. Suc...
Giovanni Beltrame, Carlo Brandolese, William Forna...
DAC
2003
ACM
16 years 20 days ago
Accurate timing analysis by modeling caches, speculation and their interaction
Schedulability analysis of real-time embedded systems requires worst case timing guarantees of embedded software performance. This involves not only language level program analysi...
Xianfeng Li, Tulika Mitra, Abhik Roychoudhury
IPPS
2006
IEEE
15 years 5 months ago
A simulator for parallel applications with dynamically varying compute node allocation
Dynamically allocating computing nodes to parallel applications is a promising technique for improving the utilization of cluster resources. We introduce the concept of dynamic ef...
Basile Schaeli, B. Gerlach, Roger D. Hersch
LADC
2011
Springer
14 years 2 months ago
Timing Analysis of Leader-Based and Decentralized Byzantine Consensus Algorithms
—We compare in an analytical way two leader-based and decentralized algorithms (that is, algorithms that do not use a leader) for Byzantine consensus with strong validity. We sho...
Fatemeh Borran, Martin Hutle, André Schiper
WETICE
1999
IEEE
15 years 4 months ago
Static Analysis of Binary Code to Isolate Malicious Behaviors
In this paper, we address the problem of static slicing on binary executables for the purposes of the malicious code detection in COTS components. By operating directly on binary ...
J. Bergeron, Mourad Debbabi, M. M. Erhioui, B&eacu...