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» High-Level Execution Time Analysis
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FDL
2003
IEEE
15 years 2 months ago
Design and Power Analysis in SysteC of an I2C Bus Driver
The paper presents a methodology to integrate information on power consumption in a high level functional description of a System-on-chip. The power dissipated during the executio...
Marco Caldari, Massimo Conti, Paolo Crippa, Simone...
WSC
1998
14 years 11 months ago
Applying Temporal Databases to HLA Data Collection and Analysis
The High Level Architecture (HLA) for distributed simulations was proposed by the Defense Modeling and Simulation Office of the Department of Defense (DOD) in order to support int...
Thom McLean, Leo Mark, Margaret L. Loper, David Ro...
SPIN
2004
Springer
15 years 2 months ago
Formal Analysis of Processor Timing Models
Hard real-time systems need methods to determine upper bounds for their execution times, usually called worst-case execution
Reinhard Wilhelm
WCET
2008
14 years 11 months ago
TuBound - A Conceptually New Tool for Worst-Case Execution Time Analysis
TUBOUND is a conceptually new tool for the worst-case execution time (WCET) analysis of programs. A distinctive feature of TUBOUND is the seamless integration of a WCET analysis c...
Adrian Prantl, Markus Schordan, Jens Knoop
DAC
2007
ACM
15 years 10 months ago
Modeling the Function Cache for Worst-Case Execution Time Analysis
Static worst-case execution time (WCET) analysis is done by modeling the hardware behavior. In this paper we describe a WCET analysis technique to analyze systems with function ca...
Raimund Kirner, Martin Schoeberl