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» High-Level Power Modeling, Estimation, and Optimization
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ISVLSI
2006
IEEE
150views VLSI» more  ISVLSI 2006»
15 years 3 months ago
Design and Analysis of a Low Power VLIW DSP Core
Power consumption has been the primary issue in processor design, with various power reduction strategies being adopted from system-level to circuitlevel. In order to develop a po...
Chan-Hao Chang, Diana Marculescu
TVLSI
2008
139views more  TVLSI 2008»
14 years 9 months ago
Ternary CAM Power and Delay Model: Extensions and Uses
Applications in computer networks often require high throughput access to large data structures for lookup and classification. While advanced algorithms exist to speed these search...
Banit Agrawal, Timothy Sherwood
WSC
2004
14 years 11 months ago
Hierarchical Production Planning Using a Hybrid System Dynamic - Discrete Event Simulation Architecture
Hierarchical production planning provides a formal bridge between long-term plans and short-term schedules. A hybrid simulation-based production planning architecture consisting o...
Jayendran Venkateswaran, Young-Jun Son, Albert Jon...
ICRA
2003
IEEE
169views Robotics» more  ICRA 2003»
15 years 2 months ago
Robust model-based 3D object recognition by combining feature matching with tracking
− We propose a vision based 3D object recognition and tracking system, which provides high level scene descriptions such as object identification and 3D pose information. The sys...
Sungho Kim, In-So Kweon, Incheol Kim
IPSN
2007
Springer
15 years 3 months ago
Power scheduling for wireless sensor and actuator networks
We previously presented a model for some wireless sensor and actuator network (WSAN) applications based on the vector space tools of frame theory. In this WSAN model there is a we...
Christopher J. Rozell, Don H. Johnson