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FCCM
2008
IEEE
145views VLSI» more  FCCM 2008»
15 years 4 months ago
High-Speed Elliptic Curve Cryptography Accelerator for Koblitz Curves
Kimmo U. Järvinen, Jorma O. Skyttä
82
Voted
ASAP
2006
IEEE
124views Hardware» more  ASAP 2006»
14 years 11 months ago
Low Complexity Design of High Speed Parallel Decision Feedback Equalizers
This paper proposes a novel parallel approach for pipelining of nested multiplexer loops to design high speed decision feedback equalizers (DFEs) based on look-ahead techniques. I...
Daesun Oh, Keshab K. Parhi
ITC
2003
IEEE
116views Hardware» more  ITC 2003»
15 years 3 months ago
Circular BIST testing the digital logic within a high speed Serdes
High Speed Serializer Deserializers (serdes) are traditionally tested using functional BIST. This paper presents an improved BIST for testing the digital part of a serdes using ci...
Graham Hetherington, Richard Simpson
ASAP
2006
IEEE
85views Hardware» more  ASAP 2006»
15 years 3 months ago
High Speed Channel Coding Architectures for the Uncoordinated OR Channel
Herwin Chan, Miguel Griot, Andres I. Vila Casado, ...