Sciweavers

181 search results - page 15 / 37
» High-level area and power estimation for VLSI circuits
Sort
View
ASPDAC
2007
ACM
117views Hardware» more  ASPDAC 2007»
15 years 1 months ago
A Current-based Method for Short Circuit Power Calculation under Noisy Input Waveforms
An accurate model is presented to calculate the short circuit energy dissipation of logic cells. The short circuit current is highly dependent on the input and output voltage valu...
Hanif Fatemi, Shahin Nazarian, Massoud Pedram
DAC
1999
ACM
15 years 1 months ago
Automated Phase Assignment for the Synthesis of Low Power Domino Circuits
High performance circuit techniques such as domino logic have migrated from the microprocessor world into more mainstream ASIC designs. The problem is that domino logic comes at a...
Priyadarshan Patra, Unni Narayanan
76
Voted
ISCAS
2008
IEEE
115views Hardware» more  ISCAS 2008»
15 years 4 months ago
FSMD partitioning for low power using simulated annealing
— It is well known that significant power savings can be obtained by disabling or shutting down parts of a circuit during idle periods. One method is to use a high level partiti...
Nainesh Agarwal, Nikitas J. Dimopoulos
GLVLSI
2009
IEEE
112views VLSI» more  GLVLSI 2009»
15 years 4 months ago
Simultaneous shield and repeater insertion
Resource based optimization for high performance integrated circuits is presented. The methodology is applied to simultaneous shield and repeater insertion, resulting in minimum c...
Renatas Jakushokas, Eby G. Friedman
ICCAD
1996
IEEE
151views Hardware» more  ICCAD 1996»
15 years 1 months ago
Expected current distributions for CMOS circuits
The analysis of CMOS VLSI circuit switching current has become an increasingly important and difficult task from both a VLSI design and simulation software perspective. This paper...
Dennis J. Ciplickas, Ronald A. Rohrer