181 search results - page 17 / 37 » High-level area and power estimation for VLSI circuits |
VLSID
2005
IEEE
15 years 10 months ago
2005
IEEE
We propose a novel, non-simulative, probabilistic model for switching activity in sequential circuits, capturing both spatio-temporal correlations at internal nodes and higher ord...
SBCCI
2003
ACM
15 years 2 months ago
2003
ACM
As we scale down to deep submicron (DSM) technology, noise is becoming a metric of equal importance as power, speed, and area. Smaller feature sizes, low voltage, and high frequen...
DAC
2005
ACM
15 years 10 months ago
2005
ACM
Achieving design closure is one of the biggest headaches for modern VLSI designers. This problem is exacerbated by high-level design automation tools that ignore increasingly impo...
GLVLSI
2002
IEEE
15 years 2 months ago
2002
IEEE
We present a low-power sine-output Direct Digital Frequency Synthesizer (DDFS) realized in 0.18 µm CMOS that achieves 60 dBc spectral purity from DC to the Nyquist frequency. No ...
VLSID
2006
IEEE
15 years 10 months ago
2006
IEEE
This article describes a standard cell based novel implementation of a low-power Viterbi Decoder (VD) targeted for the IEEE 802.11a Wireless LAN system. Multiple clock rates have ...