181 search results - page 18 / 37 » High-level area and power estimation for VLSI circuits |
MJ
2007
14 years 9 months ago
2007
With increasingly smaller feature sizes and higher on-chip densities, the power dissipation of VLSI systems has become a primary concern for designers. This paper first describes...
IOLTS
2005
IEEE
15 years 3 months ago
2005
IEEE
With the aggressive scaling of the CMOS technology parametric variation of the transistor threshold voltage causes significant spread in the circuit delay as well as leakage spect...
LCN
2006
IEEE
15 years 3 months ago
2006
IEEE
— The paper presents a thought experiment as to the feasibility of using large scale wireless sensor networks as a vehicle for high level scientific investigation. The discussion...
SBCCI
2006
ACM
15 years 3 months ago
2006
ACM
A new ultra low-power Class-AB Sinh integrator is proposed here. The translinear companding integrator is based on hyperbolic-sine transconductors and uses only one grounded capac...
ISQED
2006
IEEE
15 years 3 months ago
2006
IEEE
— In this paper, we propose an efficient algorithm to reduce the voltage noises for on-chip power/ground (P/G) networks of VLSI. The new method is based on the sequence of linea...