181 search results - page 27 / 37 » High-level area and power estimation for VLSI circuits |
GLVLSI
2010
IEEE
15 years 2 months ago
2010
IEEE
Processors have traditionally been designed for the worst-case, resulting in designs that have high yields, but are expensive in terms of area and power. Better-than-worst-case (B...
84
Voted
DAC
2004
ACM
15 years 1 months ago
2004
ACM
The high leakage current in nano-meter regimes is becoming a significant portion of power dissipation in CMOS circuits as threshold voltage, channel length, and gate oxide thickne...
110
Voted
GLVLSI
2009
IEEE
15 years 4 months ago
2009
IEEE
In this paper, we propose novel architectural and design techniques for three-dimensional field-programmable gate arrays (3D FPGAs) with Through-Silicon Vias (TSVs). We develop a...
TVLSI
2002
14 years 9 months ago
2002
Abstract--The design of high integrity, area efficient power distribution grids has become of practical importance as the portion of on-chip interconnect resources dedicated to pow...
81
Voted
VLSID
2002
IEEE
15 years 10 months ago
2002
IEEE
Compare CMOS Logic with Pass-Transistor Logic, a question was raised in our mind: "Does any rule exist that contains all good?" This paper reveals novel logic synthesis ...