181 search results - page 35 / 37 » High-level area and power estimation for VLSI circuits |
VLSID
2005
IEEE
15 years 10 months ago
2005
IEEE
In this paper, we present a simple analytical equation for capturing phase errors in 3-stage ring oscillators. The model, based on a simple but useful idealization of the ring osc...
ASAP
2007
IEEE
14 years 11 months ago
2007
IEEE
This paper explores the reliability of three different minimum fan-in majority gates full adder (FA) designs, and compares them to the performance of a standard XOR-based FA. The ...
DDECS
2007
IEEE
15 years 3 months ago
2007
IEEE
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...
FCCM
1998
IEEE
15 years 1 months ago
1998
IEEE
Abstract Image processing, specifically Automatic Target Recognition (ATR) in Synthetic Aperture Radar (SAR) imagery, is an application area that can require tremendous processing ...
DAC
2001
ACM
15 years 10 months ago
2001
ACM
This paper presents the design and evaluation of an 8-bit adiabatic multiplier. Both the multiplier core and its built-in self-test logic have been designed using a true single-ph...