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» High-level area and power estimation for VLSI circuits
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ISLPED
1996
ACM
100views Hardware» more  ISLPED 1996»
15 years 1 months ago
Basic experimentation on accuracy of power estimation for CMOS VLSI circuits
In this paper, we discuss on accuracy of several kinds of power dissipation model for CMOS VLSI circuits. Some researchers have proposed several efficient power estimation methods...
Tohru Ishihara, Hiroto Yasuura
ISQED
2006
IEEE
153views Hardware» more  ISQED 2006»
15 years 3 months ago
Improving Transient Error Tolerance of Digital VLSI Circuits Using RObustness COmpiler (ROCO)
Due to aggressive technology scaling, VLSI circuits are becoming increasingly susceptible to transient errors caused by single-event-upsets (SEUs). In this paper, we introduce two...
Chong Zhao, Sujit Dey
ICCAD
1994
IEEE
115views Hardware» more  ICCAD 1994»
15 years 1 months ago
Fast transient power and noise estimation for VLSI circuits
Abstract - Today's digital design systems are running out of steam, when it comes to meeting the challenges presented by simultaneous switching, power consumption and reliabil...
Wolfgang T. Eisenmann, Helmut E. Graeb
ISLPED
1997
ACM
130views Hardware» more  ISLPED 1997»
15 years 1 months ago
K2: an estimator for peak sustainable power of VLSI circuits
New measures of peak power in the context of sequential circuits are proposed. This paper presents an automatic procedure to obtain very good lower bounds on these measures as wel...
Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. P...
ISQED
2009
IEEE
133views Hardware» more  ISQED 2009»
15 years 4 months ago
A novel ACO-based pattern generation for peak power estimation in VLSI circuits
Estimation of maximal power consumption is an essential task in VLSI circuit realizations since power value significantly affects the reliability of the circuits. The key issue o...
Yi-Ling Liu, Chun-Yao Wang, Yung-Chih Chen, Ya-Hsi...