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109
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SAMOS
2004
Springer
15 years 5 months ago
High-Level Energy Estimation for ARM-Based SOCs
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, P...
89
Voted
INFOCOM
2003
IEEE
15 years 5 months ago
MEDF - A Simple Scheduling Algorithm for Two Real-Time Transport Service Classes with Application in the UTRAN
— In this paper, we consider real-time speech traffic, real-time circuit-switched data (CSD) and non-real-time packetswitched data (PSD) in the UMTS Terrestrial Radio Access Net...
Michael Menth, Matthias Schmid, Herbert Heiss, Tho...
PVG
2003
IEEE
212views Visualization» more  PVG 2003»
15 years 5 months ago
SLIC: Scheduled Linear Image Compositing for Parallel Volume Rendering
Parallel volume rendering offers a feasible solution to the large data visualization problem by distributing both the data and rendering calculations among multiple computers con...
Aleksander Stompel, Kwan-Liu Ma, Eric B. Lum, Jame...
103
Voted
ISLPED
2003
ACM
122views Hardware» more  ISLPED 2003»
15 years 5 months ago
A mixed-clock issue queue design for globally asynchronous, locally synchronous processor cores
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...
Venkata Syam P. Rapaka, Diana Marculescu
FPGA
2003
ACM
120views FPGA» more  FPGA 2003»
15 years 4 months ago
Architecture evaluation for power-efficient FPGAs
This paper presents a flexible FPGA architecture evaluation framework, named fpgaEVA-LP, for power efficiency analysis of LUT-based FPGA architectures. Our work has several contri...
Fei Li, Deming Chen, Lei He, Jason Cong