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IPPS
1999
IEEE
15 years 6 months ago
Hiding Communication Latency in Reconfigurable Message-Passing Environments
Communication overhead is one of the most important factors affecting the performance of message passing multicomputers. We present evidence (through the analysis of several paral...
Ahmad Afsahi, Nikitas J. Dimopoulos
FPL
2005
Springer
119views Hardware» more  FPL 2005»
15 years 7 months ago
Yield modelling and Yield Enhancement for FPGAs using Fault Tolerance Schemes
This paper presents a revised model for the yield analysis of FPGA interconnect layers. Based on proven yield models, this work improves the predictions and assumptions of previous...
Nicola Campregher, Peter Y. K. Cheung, George A. C...
ISQED
2005
IEEE
98views Hardware» more  ISQED 2005»
15 years 7 months ago
A More Effective CEFF
Precise chip-level timing requires careful modeling of the interaction between logic drivers and interconnect. Existing static-timing analysis methodologies generate models for dr...
Sani R. Nassif, Zhuo Li
83
Voted
GI
2005
Springer
15 years 7 months ago
A Model for the Classification of Interorganisational Standards
: Interorganisational standards are an important requirement for loosely coupled interorganisational relationships such as supply chain networks. The many different standardisation...
Ulrich M. Löwer
VTS
1996
IEEE
74views Hardware» more  VTS 1996»
15 years 6 months ago
An unexpected factor in testing for CMOS opens: the die surface
In this paper, we for the rst time present experimental evidence that the die surface can act as an RC interconnect, becoming an important factor in determining the voltage of a o...
Haluk Konuk, F. Joel Ferguson