537 search results - page 9 / 108 » High-precision interconnect analysis |
EUROMICRO
1996
IEEE
15 years 3 months ago
1996
IEEE
In thispaper,a mathematicalmethodfor analysis of synchronous packet-switching interconnection networks with jinite buffering capacity at the output of switching elements ispresent...
84
Voted
ICCAD
2003
IEEE
15 years 8 months ago
2003
IEEE
The Y-architecture for on-chip interconnect is based on pervasive use of 0-, 120-, and 240-degree oriented semi-global and global wiring. Its use of three uniform directions explo...
101
Voted
TVLSI
2010
14 years 6 months ago
2010
To efficiently analyze the large-scale interconnect dominant circuits with inductive couplings (mutual inductances), this paper introduces a new state matrix, called VNA, to stamp ...
74
Voted
ICCAD
2004
IEEE
15 years 8 months ago
2004
IEEE
We demonstrate an algorithmfor interconnect modeling in rhe presence ofprocess variation based on extension of the truncated balanced realizationmodel reduction algorithmto multi-...
124
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DATE
2003
IEEE
15 years 5 months ago
2003
IEEE
Interconnect networks play a critical role in shared memory multiprocessor systems-on-chip (MPSoC) designs. MPSoC performance and power consumption are greatly affected by the pac...