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ISQED
2007
IEEE
114views Hardware» more  ISQED 2007»
15 years 6 months ago
Intelligent Random Vector Generator Based on Probability Analysis of Circuit Structure
Design verification has become a bottleneck of modern designs. Recently, simulation-based random verification has attracted a lot of interests due to its effectiveness in uncoveri...
Yu-Min Kuo, Cheng-Hung Lin, Chun-Yao Wang, Shih-Ch...
MSE
1999
IEEE
96views Hardware» more  MSE 1999»
15 years 4 months ago
The Effect of ABET's EC2000 on curriculum: Early Indications
This paper summarizes the background and history leading to the development, adoption, and implementation of ABET's Engineering Criteria 2000 (EC2000). A sampling of program ...
Jerry Yeargan
DAC
2009
ACM
16 years 23 days ago
Online cache state dumping for processor debug
Post-silicon processor debugging is frequently carried out in a loop consisting of several iterations of the following two key steps: (i) processor execution for some duration, fo...
Anant Vishnoi, Preeti Ranjan Panda, M. Balakrishna...
CSCW
2004
ACM
15 years 5 months ago
Learning from project history: a case study for software development
The lack of lightweight communication channels and other technical and sociological difficulties make it hard for new members of a non-collocated software development team to lea...
Davor Cubranic, Gail C. Murphy, Janice Singer, Kel...
CVPR
2007
IEEE
16 years 1 months ago
Offline Signature Verification Using Online Handwriting Registration
This paper proposes a novel framework for offline signature verification. Different from previous methods, our approach makes use of online handwriting instead of handwritten imag...
Yu Qiao, Jianzhuang Liu, Xiaoou Tang