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ASPDAC
2006
ACM
109views Hardware» more  ASPDAC 2006»
15 years 5 months ago
Cycle error correction in asynchronous clock modeling for cycle-based simulation
— As the complexity of SoCs is increasing, hardware/software co-verification becomes an important part of system verification. C-level cycle-based simulation could be an efficien...
Junghee Lee, Joonhwan Yi
SPAA
2004
ACM
15 years 5 months ago
The potential in energy efficiency of a speculative chip-multiprocessor
While lower supply voltage is effective for energy reduction, it suffers performance loss. To mitigate the loss, we propose to execute only the part, which does not have any influ...
Yuu Tanaka, Toshinori Sato, Takenori Koushiro
FMSD
1998
77views more  FMSD 1998»
14 years 11 months ago
An Analysis of Bitstate Hashing
The bitstate hashing, or supertrace, technique was introduced in 1987 as a method to increase the quality of verification by reachability analyses for applications that defeat anal...
Gerard J. Holzmann
JUCS
2006
109views more  JUCS 2006»
14 years 11 months ago
Verifying Real-Time Properties of tccp Programs
: The size and complexity of software systems are continuously increasing, which makes them difficult and labor-intensive to develop, test and evolve. Since concurrent systems are ...
María Alpuente, María-del-Mar Gallar...
POPL
2007
ACM
16 years 4 days ago
Modular verification of a non-blocking stack
This paper contributes to the development of techniques for the modular proof of programs that include concurrent algorithms. We present a proof of a non-blocking concurrent algor...
Matthew J. Parkinson, Richard Bornat, Peter W. O'H...