851 search results - page 72 / 171 » History Effects and Verification |
111
Voted
ICSE
2008
IEEE-ACM
16 years 1 months ago
2008
IEEE-ACM
Software architecture evaluation has a crucial role in the life cycle of software intensive systems. In this paper we propose an approach to empower a software architecture evalua...
ASYNC
2002
IEEE
15 years 6 months ago
2002
IEEE
Wire and gate delays are accounted to have equal, or nearly equal, effect on circuit behavior in modern design techniques. This paper introduces a new approach to verify circuits ...
107
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ICCAD
1996
IEEE
15 years 5 months ago
1996
IEEE
-- In this tutorial we discuss concepts and techniques for the accurate and efficient modeling and extraction of interconnect parasitics in VLSI designs. Due toincreasing operating...
113
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APLAS
2006
ACM
15 years 5 months ago
2006
ACM
Abstract. Fast dynamic compilers trade code quality for short compilation time in order to balance application performance and startup time. This paper investigates the interplay o...
BIRTHDAY
2008
Springer
15 years 3 months ago
2008
Springer
One of the surprising developments in the area of program verification is how ideas introduced originally by logicians in the 1950s ended up yielding by 2003 an industrial-standard...