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ICCSA
2004
Springer
15 years 3 months ago
A Reduced Codification for the Logical Representation of Job Shop Scheduling Problems
Abstract. This paper presents the Job Shop Scheduling Problem (JSSP) represented as the well known Satisfiabilty Problem (SAT). Even though the representation of JSSP in SAT is not...
Juan Frausto Solís, Marco Antonio Cruz-Chav...
120
Voted
SBCCI
2003
ACM
135views VLSI» more  SBCCI 2003»
15 years 3 months ago
Modeling a Reconfigurable System for Computing the FFT in Place via Rewriting-Logic
The growing adoption of reconfigurable architectures opens new implementation alternatives and creates new design challenges. In the case of dynamically reconfigurable architectur...
Mauricio Ayala-Rincón, Rodrigo B. Nogueira,...
98
Voted
ADL
1998
Springer
184views Digital Library» more  ADL 1998»
15 years 2 months ago
Logical Information Modeling of Web-Accessible Heterogeneous Digital Assets
This paper introduces the MREF framework for representing and correlating information at a higher semantic level than is possible with Web-based information systems today. The rol...
Kshitij Shah, Amit P. Sheth
CMSB
2006
Springer
15 years 1 months ago
Regulatory Network Reconstruction Using Stochastic Logical Networks
Abstract. This paper presents a method for regulatory network reconstruction from experimental data. We propose a mathematical model for regulatory interactions, based on the work ...
Bartek Wilczynski, Jerzy Tiuryn
EVOW
2008
Springer
14 years 12 months ago
Analysis of Reconfigurable Logic Blocks for Evolvable Digital Architectures
Abstract. In this paper we propose three small instances of a reconfigurable circuit and analyze their properties using the brute force method and evolutionary algorithm. Although ...
Lukás Sekanina, Petr Mikusek