119 search results - page 12 / 24 » Hyperreconfigurable Architectures for Fast Run Time Reconfig... |
139
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ERSA
2008
15 years 6 months ago
2008
This paper presents an accelerator for k-th nearest neighbor thinning, a run time intensive algorithmic kernel used in recent multi-objective optimizers. We discuss the thinning al...
132
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ISPASS
2006
IEEE
15 years 10 months ago
2006
IEEE
Detailed microarchitectural simulators are not well suited for exploring large design spaces due to their excessive simulation times. We introduce AXCIS, a framework for fast and ...
124
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RTSS
2007
IEEE
15 years 10 months ago
2007
IEEE
Time-triggered architectures (TTAs) are strong candidate platforms for safety-critical real-time applications. A typical time-triggered architecture is constituted by one or more ...
152
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DAC
2006
ACM
2006
ACM
A fast on-chip decoupling capacitance budgeting algorithm using macromodeling and linear programming
15 years 10 months ago
We propose a novel and efficient charge-based decoupling capacitance budgeting algorithm. Our method uses the macromodeling technique and effective radius of decoupling capacitan...
183
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CASES
2006
ACM
15 years 10 months ago
2006
ACM
Developing an optimizing compiler for a newly proposed architecture is extremely difficult when there is only a simulator of the machine available. Designing such a compiler requ...