119 search results - page 17 / 24 » Hyperreconfigurable Architectures for Fast Run Time Reconfig... |
DAC
1999
ACM
15 years 1 months ago
1999
ACM
: In this work we propose a technique for spatial and temporal partitioning of a logic circuit based on the nodes activity computed by using a simulation at an higher level of ion....
HICSS
1995
IEEE
15 years 1 months ago
1995
IEEE
The computing community has long faced the problem of scientifically comparing different computers and different algorithms. When architecture, method, precision, or storage capac...
DATE
2003
IEEE
15 years 2 months ago
2003
IEEE
Software streaming allows the execution of streamenabled software on a device even while the transmission/streaming may still be in progress. Thus, the software can be executed wh...
83
Voted
AHS
2007
IEEE
14 years 9 months ago
2007
IEEE
Online incremental evolution for a complex high-speed pattern recognition architecture has been implemented on a Xilinx Virtex-II Pro FPGA. The fitness evaluation module is entir...
100
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DSN
2003
IEEE
15 years 2 months ago
2003
IEEE
The DepAuDE architecture provides middleware to integrate fault tolerance support into distributed embedded automation applications. It allows error recovery to be expressed in te...