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MICRO
2007
IEEE
108views Hardware» more  MICRO 2007»
15 years 3 months ago
FPGA-Accelerated Simulation Technologies (FAST): Fast, Full-System, Cycle-Accurate Simulators
This paper describes FAST, a novel simulation methodology that can produce simulators that (i) are orders of magnitude faster than comparable simulators, (ii) are cycleaccurate, (...
Derek Chiou, Dam Sunwoo, Joonsoo Kim, Nikhil A. Pa...
RECONFIG
2008
IEEE
198views VLSI» more  RECONFIG 2008»
15 years 3 months ago
High Performance Implementation of a Public Key Block Cipher - MQQ, for FPGA Platforms
– We have implemented in FPGA recently published class of public key algorithms – MQQ, that are based on quasigroup string transformations. Our implementation achieves decrypti...
Mohamed El-Hadedy, Danilo Gligoroski, Svein J. Kna...
61
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FPL
2004
Springer
101views Hardware» more  FPL 2004»
15 years 2 months ago
Automatic Creation of Reconfigurable PALs/PLAs for SoC
Many System-on-a-Chip devices would benefit from the inclusion of reprogrammable logic on the silicon die, as it can add general computing ability, provide run -time reconfigurabil...
Mark Holland, Scott Hauck
ISCA
2006
IEEE
133views Hardware» more  ISCA 2006»
15 years 3 months ago
TRAP-Array: A Disk Array Architecture Providing Timely Recovery to Any Point-in-time
RAID architectures have been used for more than two decades to recover data upon disk failures. Disk failure is just one of the many causes of damaged data. Data can be damaged by...
Qing Yang, Weijun Xiao, Jin Ren
96
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FCCM
2005
IEEE
115views VLSI» more  FCCM 2005»
15 years 3 months ago
FIFO Communication Models in Operating Systems for Reconfigurable Computing
Increasing demands upon embedded systems for higher level services like networking, user interfaces and file system management, are driving growth in fully-featured operating syst...
John A. Williams, Neil W. Bergmann, X. Xie