59 search results - page 11 / 12 » ILP Models for the Synthesis of Asynchronous Control Circuit... |
CHES
2005
Springer
13 years 12 months ago
2005
Springer
Abstract. It has recently been shown that logic circuits in the implementation of cryptographic algorithms, although protected by “secure” random masking schemes, leak side-cha...
ISSS
2002
IEEE
13 years 11 months ago
2002
IEEE
ForSyDe (FORmal SYstem DEsign) is a methodology which addresses the design of SoC applications which may contain control as well as data flow dominated parts. Starting with a for...
ICES
2001
Springer
13 years 10 months ago
2001
Springer
This paper introduces the concept of polymorphic electronics (polytronics) –referring to electronics with superimposed built-in functionality. A function change does not require ...
CODES
2003
IEEE
13 years 11 months ago
2003
IEEE
In this paper, we describe a new methodology based on game theory for minimizing the average power of a circuit during scheduling in behavioral synthesis. The problem of schedulin...
ENTCS
2008
13 years 6 months ago
2008
This paper reports on the design of a test chip built to test a) a new latency insensitive network fabric protocol and circuits, b) a new synchronizer design, and c) how efficient...