3 search results - page 1 / 1 » ILP-based Instruction Scheduling for IA-64 |
101
Voted
LCTRTS
2001
Springer
15 years 2 months ago
2001
Springer
The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...
96
Voted
JUCS
2000
14 years 10 months ago
2000
: This paper presents an evaluation of our Scheduled Dataflow (SDF) Processor. Recent focus in the field of new processor architectures is mainly on VLIW (e.g. IA-64), superscalar ...
103
Voted
CASES
2007
ACM
15 years 2 months ago
2007
ACM
The key to increasing performance without a commensurate increase in power consumption in modern processors lies in increasing both parallelism and core specialization. Core speci...