128 search results - page 13 / 26 » ILP-based optimization of sequential circuits for low power |
ISQED
2009
IEEE
15 years 4 months ago
2009
IEEE
Estimation of maximal power consumption is an essential task in VLSI circuit realizations since power value significantly affects the reliability of the circuits. The key issue o...
DAC
1997
ACM
15 years 1 months ago
1997
ACM
An ATPG technique is proposed that reduces heat dissipation during testing of sequential circuits that have full-scan. The objective is to permit safe and inexpensive testing of l...
APCCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
— A data driven approach to design and optimization of low power combinational multipliers is presented. This technique depends on signal gating to avoid un-necessary computation...
DATE
2006
IEEE
15 years 3 months ago
2006
IEEE
We propose instruction-driven slicing, a new technique for annotating microprocessor descriptions at the Register Transfer Level (RTL) in order to achieve lower power dissipation....
DAC
2001
ACM
15 years 10 months ago
2001
ACM
In modern embedded systems including communication and multimedia applications, large fraction of power is consumed during memory access and data transfer. Thus, buses should be d...