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» ILP-based optimization of sequential circuits for low power
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DAGSTUHL
2006
14 years 11 months ago
The optimal sequence compression
This paper presents the optimal compression for sequences with undefined values. Let we have (N -m) undefined and m defined positions in the boolean sequence V of length N. The se...
Alexander E. Andreev
DAC
2005
ACM
14 years 11 months ago
Total power reduction in CMOS circuits via gate sizing and multiple threshold voltages
Minimizing power consumption is one of the most important objectives in IC design. Resizing gates and assigning different Vt’s are common ways to meet power and timing budgets. ...
Feng Gao, John P. Hayes
DATE
2010
IEEE
166views Hardware» more  DATE 2010»
15 years 2 months ago
From transistors to MEMS: Throughput-aware power gating in CMOS circuits
—In this paper we study the effectiveness of two power gating methods – transistor switches and MEMS switches – in reducing the power consumption of a design with a certain t...
Michael B. Henry, Leyla Nazhandali
ICCD
2001
IEEE
121views Hardware» more  ICCD 2001»
15 years 6 months ago
Determining Schedules for Reducing Power Consumption Using Multiple Supply Voltages
Dynamic power is the main source of power consumption in CMOS circuits. It depends on the square of the supply voltage. It may significantly be reduced by scaling down the supply ...
Noureddine Chabini, El Mostapha Aboulhamid, Yvon S...
DAC
2004
ACM
15 years 10 months ago
FPGA power reduction using configurable dual-Vdd
Power optimization is of growing importance for FPGAs in nanometer technologies. Considering dual-Vdd technique, we show that configurable power supply is required to obtain a sat...
Fei Li, Yan Lin, Lei He