128 search results - page 18 / 26 » ILP-based optimization of sequential circuits for low power |
100
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DATE
1999
IEEE
15 years 4 months ago
1999
IEEE
In this paper, we consider the problem of maximizing the battery life (or duration of service) in battery-powered CMOS circuits. We first show that the battery efficiency (or utili...
ICCAD
2006
IEEE
15 years 8 months ago
2006
IEEE
In a synchronous finite state machine (FSM), huge current peaks are often observed at the moment of state transition. Previous low power state encoding algorithms focus on the red...
DAC
2006
ACM
16 years 18 days ago
2006
ACM
Subthreshold circuit designs have been demonstrated to be a successful alternative when ultra-low power consumption is paramount. However, the characteristics of MOS transistors i...
112
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DAC
2008
ACM
15 years 1 months ago
2008
ACM
Clock skew scheduling has been traditionally considered as a tool for improving the clock period in a sequential circuit. Timing slack is "stolen" from fast combinationa...
VLSID
2002
IEEE
16 years 13 hour ago
2002
IEEE
Compare CMOS Logic with Pass-Transistor Logic, a question was raised in our mind: "Does any rule exist that contains all good?" This paper reveals novel logic synthesis ...