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» ILP-based optimization of sequential circuits for low power
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DATE
2006
IEEE
108views Hardware» more  DATE 2006»
15 years 3 months ago
Architectural and technology influence on the optimal total power consumption
In this paper, an approximated closed-form total power consumption equation for circuits working at their optimal supply and threshold voltage is presented. Comparisons of this fo...
Christian Schuster, Jean-Luc Nagel, Christian Pigu...
AUTOID
2005
IEEE
15 years 3 months ago
A Low Power and High Performance Analog Front End for Passive RFID Transponder
This paper presents a novel low power and high performance analog front end circuit for passive RFID transponder. With a novel architecture including three rectifier circuits, amo...
Jianyun Hu, Hao Min
DATE
2003
IEEE
87views Hardware» more  DATE 2003»
15 years 2 months ago
A Novel, Low-Cost Algorithm for Sequentially Untestable Fault Identification
This paper presents a new and low-cost approach for identifying sequentially untestable faults. Unlike the single fault theorem, where the stuck-at fault is injected only in the r...
Manan Syal, Michael S. Hsiao
ICCAD
1995
IEEE
135views Hardware» more  ICCAD 1995»
15 years 29 days ago
An iterative improvement algorithm for low power data path synthesis
We address the problem of minimizing power consumption in behavioral synthesis of data-dominated circuits. The complex nature of power as a cost function implies that the effects ...
Anand Raghunathan, Niraj K. Jha