128 search results - page 7 / 26 » ILP-based optimization of sequential circuits for low power |
DATE
2006
IEEE
15 years 3 months ago
2006
IEEE
—Optimizing sequential cycles is essential for many types of high-performance circuits, such as pipelines for packet processing. Retiming is a powerful technique for speeding pip...
72
Voted
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
Soft errors in combinational and sequential elements of digital circuits are an increasing concern as a result of technology scaling. Several techniques for gate and latch hardeni...
VTS
2005
IEEE
15 years 3 months ago
2005
IEEE
An automated design procedure is described for synthesizing circuits with low power concurrent error detection. It is based on pre-synthesis selection of a parity-check code follo...
DAC
2007
ACM
15 years 10 months ago
2007
ACM
This paper presents a variation resilient circuit design technique for maintaining parametric yield of design under inherent variation in process parameters. We propose to utilize...
ICCAD
2002
IEEE
15 years 6 months ago
2002
IEEE
Abstract—Interconnects (wires, buffers, clock distribution networks, multiplexers and busses) consume a significant fraction of total circuit power. In this work, we demonstrat...