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» Identifying and Exploiting Ultrametricity
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RTAS
1998
IEEE
15 years 6 months ago
Bounding Loop Iterations for Timing Analysis
Static timing analyzers need to know the minimum and maximum number of iterations associated with each loop in a real-time program so accurate timing predictions can be obtained. ...
Christopher A. Healy, Mikael Sjödin, Viresh R...
FPL
1998
Springer
86views Hardware» more  FPL 1998»
15 years 6 months ago
Self Modifying Circuitry - A Platform for Tractable Virtual Circuitry
The readily available performance advantages, gained in early virtual circuitry systems, are being recouped following advances in general purpose processor architectures and have ...
Adam Donlin
115
Voted
MICRO
1997
IEEE
79views Hardware» more  MICRO 1997»
15 years 6 months ago
On High-Bandwidth Data Cache Design for Multi-Issue Processors
Highly aggressive multi-issue processor designs of the past few years and projections for the next decade require that we redesign the operation of the cache memory system. The nu...
Jude A. Rivers, Gary S. Tyson, Edward S. Davidson,...
VRST
1997
ACM
15 years 6 months ago
View volume culling using a probabilistic caching scheme
This paper describes a new algorithm for view volume culling. During an interactive walkthrough of a 3D scene, at any moment a large proportion of objects will be outside of the v...
Mel Slater, Yiorgos Chrysanthou
AADEBUG
1997
Springer
15 years 6 months ago
Application of Dynamic Slicing in Program Debugging
A dynamic program slice is an executable part of a program whose behavior is identical, for the same program input, to that of the original program with respect to a variable(s) o...
Bogdan Korel, Juergen Rilling