104 search results - page 16 / 21 » Impact Analysis of Process Variability on Clock Skew |
GLVLSI
2008
IEEE
15 years 3 months ago
2008
IEEE
Statistical static timing analysis (SSTA) plays a key role in determining performance of the VLSI circuits implemented in state-of-the-art CMOS technology. A pre-requisite for emp...
TVLSI
2010
14 years 4 months ago
2010
Abstract-- The operational characteristics of integrated circuits based on nanoscale semiconductor technology are expected to be increasingly affected by variations in the manufact...
DAC
2000
ACM
15 years 1 months ago
2000
ACM
Abstract: This paper presents a new statistical methodology to simulate the effect of both inter-die and intra-die variation on the electrical performance of analog integrated circ...
CODES
2006
IEEE
15 years 3 months ago
2006
IEEE
Process variability has a detrimental impact on the performance of memories and other system components, which can lead to parametric yield loss at the system level due to timing ...
EH
2005
IEEE
15 years 3 months ago
2005
IEEE
Manufacturing processes are a key source of faults in complex hardware systems. Minimizing this impact of manufacturing uncertainties is one way towards achieving fault tolerant s...